Andrey Petrov (andrey.petrov@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13798
-gerrit
commit 52ef2dd30e1cbe4dc578a201035b2a148dc408a4 Author: Andrey Petrov andrey.petrov@intel.com Date: Thu Feb 25 14:16:33 2016 -0800
FSP2.0: Add MemoryInit API
This adds implementation of fsp_memory_init() that is used to train memory.
Change-Id: I72268aaa91eea7e4d4f072d70a47871d74c2b979 Signed-off-by: Andrey Petrov andrey.petrov@intel.com --- src/drivers/intel/fsp2_0/memory_init.c | 77 ++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+)
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c new file mode 100644 index 0000000..2cd5919 --- /dev/null +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -0,0 +1,77 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Andrey Petrov andrey.petrov@intel.com for Intel Corp.) + * (Written by Alexandru Gagniuc alexandrux.gagniuc@intel.com for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/io.h> +#include <arch/cpu.h> +#include <console/console.h> +#include <fsp/api.h> +#include <fsp/util.h> +#include <memrange.h> +#include <string.h> +#include <timestamp.h> + +struct fsp_memory_init_params { + void *nvs_buffer; + void *raminit_upd; + void **hob_list; +} __attribute__ ((__packed__)); + +typedef asmlinkage enum fsp_status (*fsp_memory_init_fn) + (struct fsp_memory_init_params *); + +static enum fsp_status do_fsp_memory_init(void **hob_list_ptr, + struct fsp_header *hdr) +{ + enum fsp_status status; + fsp_memory_init_fn fsp_raminit; + struct fsp_memory_init_params raminit_params; + struct FSPM_UPD *upd_region; + + post_code(0x34); + /* UPD region resides in CAR. Thus, it can be directly modified. */ + upd_region = (void*)(hdr->cfg_region_offset + hdr->image_base); + + /* Get any board specific changes */ + raminit_params.nvs_buffer = NULL; + raminit_params.raminit_upd = upd_region; + raminit_params.hob_list = hob_list_ptr; + + /* Update the UPD data */ + platform_fsp_memory_init_params_cb(upd_region); + + /* Call FspMemoryInit */ + fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); + printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_raminit); + printk(BIOS_SPEW, "\t%p: nvs_buffer\n", raminit_params.nvs_buffer); + printk(BIOS_SPEW, "\t%p: raminit_upd\n", raminit_params.raminit_upd); + printk(BIOS_SPEW, "\t%p: hob_list\n", raminit_params.hob_list); + + timestamp_add_now(TS_FSP_MEMORY_INIT_START); + status = fsp_raminit(&raminit_params); + post_code(0x37); + timestamp_add_now(TS_FSP_MEMORY_INIT_END); + + printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status); + + return status; +} + +enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *range) +{ + struct fsp_header hdr; + + if (fsp_load_binary(&hdr, CONFIG_FSP_M_FILE, range) != CB_SUCCESS) + return FSP_NOT_FOUND; + + return do_fsp_memory_init(hob_list, &hdr); +}