[coreboot-gerrit] [S] Change in coreboot[main]: soc/mediatek/common: Add more definitions for SPMI

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu.

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84773?usp=email )

Change subject: soc/mediatek/common: Add more definitions for SPMI
......................................................................

soc/mediatek/common: Add more definitions for SPMI

The newly added enums and struct members will be used by MT8196.

BUG=none
TEST=emerge-corsola coreboot; emerge-geralt coreboot

Change-Id: I32e758cc4244114073606c418a69e0467cdf1039
Signed-off-by: Yidi Lin 
---
M src/soc/mediatek/common/include/soc/pmif_spmi.h
M src/soc/mediatek/common/include/soc/spmi.h
2 files changed, 31 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/84773/1

diff --git a/src/soc/mediatek/common/include/soc/pmif_spmi.h b/src/soc/mediatek/common/include/soc/pmif_spmi.h
index d970e59..cab6de2 100644
--- a/src/soc/mediatek/common/include/soc/pmif_spmi.h
+++ b/src/soc/mediatek/common/include/soc/pmif_spmi.h
@@ -15,9 +15,14 @@

struct mtk_rgu_regs {
    u32 reserved[36];
-	u32 wdt_swsysrst2;
+	u32 wdt_swsysrst2;	/* 0x90 */
+	u32 reserved1[91];
+	u32 wdt_vlp_swsysrst0;	/* 0x0200 */
+	u32 reserved2[3];
+	u32 wdt_vlp_swsysrst1;	/* 0x0210 */
 };
 check_member(mtk_rgu_regs, wdt_swsysrst2, 0x90);
+check_member(mtk_rgu_regs, wdt_vlp_swsysrst0, 0x200);

struct mtk_spmi_mst_reg {
    u32 op_st_ctrl;
@@ -51,6 +56,7 @@
 enum {
    SPMI_CK_NO_DLY = 0,
    SPMI_CK_DLY_1T,
+	SPMI_CK_DLY_2T,
 };

enum {
diff --git a/src/soc/mediatek/common/include/soc/spmi.h b/src/soc/mediatek/common/include/soc/spmi.h
index 6d6d4a7..84ac52e 100644
--- a/src/soc/mediatek/common/include/soc/spmi.h
+++ b/src/soc/mediatek/common/include/soc/spmi.h
@@ -35,18 +35,39 @@
 enum slv_type {
    BUCK_CPU,
    BUCK_GPU,
+	BUCK_MD,
+	BUCK_RF,
+	MAIN_PMIC,
+	BUCK_VPU,
+	SUB_PMIC,
+	CLOCK_PMIC,
+	SECOND_PMIC,
+	BUCK_APU,
    SLV_TYPE_MAX,
 };

enum slv_type_id {
-	BUCK_CPU_ID,
-	BUCK_GPU_ID,
+	BUCK_RF_ID = 1,
+	BUCK_MD_ID = 3,
+	MAIN_PMIC_ID = 5,
+	BUCK_CPU_ID = 6,
+	BUCK_GPU_ID = 7,
+	BUCK_VPU_ID = 8,
+	BUCK_APU_ID = 9,
+	SUB_PMIC_ID = 10,
+	CLOCK_PMIC_ID = 11,
+	SECOND_PMIC_ID = 12,
    SLV_TYPE_ID_MAX,
 };

struct spmi_device {
-	u32 slvid;
+	enum spmi_slave slvid;
+	enum spmi_master mstid;
    enum slv_type type;
    enum slv_type_id type_id;
+	u16 hwcid_addr;
+	u8 hwcid_val;
+	u8 hwcid_mask;
 };
+
 #endif /* __SOC_MEDIATEK_SPMI_H__ */