[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Remove DDI A lane programming

[Ronak Kanabar (Code Review)]

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Nick Vaccaro, Aamir Bohra, Srinidhi N Kaushik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39313

to look at the new patch set (#15).

Change subject: soc/intel/tigerlake: Remove DDI A lane programming
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soc/intel/tigerlake: Remove DDI A lane programming

For newer Intel graphics(>11), The DDI port max lanes are set to 4 by
default. And kernel driver no longer relies on coreboot to provide
information via DDI_BUF_CTL_A(for DDI port A) register programming.
Hence removing this code.

BUG=b:150788968
BRANCH=None
TEST=checked jslrvp and tglrvp compilation and boot.

Change-Id: I32692501b60f48a07b8fbb9bb3a755b18f4b3ea9
Signed-off-by: Ronak Kanabar 
---
M src/soc/intel/tigerlake/graphics.c
1 file changed, 0 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/39313/15