Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43474 )
Change subject: mb/google/zork: Drop redundant romstage GPIO table ......................................................................
mb/google/zork: Drop redundant romstage GPIO table
The romstage GPIO tables for pre-v3 and v3 version of schematics are now the same. So, this change drops the duplicate table and also remotes the check for v3 schematics when configuring the pads in romstage.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I67ca9f587c3f47912393ebaf38badcc9d76cc393 --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 2 files changed, 6 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/43474/1
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index e8dafee..a3684d0 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -9,22 +9,7 @@ #include <boardid.h> #include <variant/gpio.h>
-static const struct soc_amd_gpio gpio_set_stage_rom_pre_v3[] = { - /* PCIE_RST1_L - Variable timings (May remove) */ - PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), - /* NVME_AUX_RESET_L */ - PAD_GPO(GPIO_40, HIGH), - /* CLK_REQ0_L - WIFI */ - PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), - /* CLK_REQ1_L - SD Card */ - PAD_NF(GPIO_115, CLK_REQ1_L, PULL_UP), - /* CLK_REQ2_L - NVMe */ - PAD_NF(GPIO_116, CLK_REQ2_L, PULL_UP), - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_142, HIGH), -}; - -static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = { +static const struct soc_amd_gpio gpio_set_stage_rom[] = { /* PCIE_RST1_L - Variable timings (May remove) */ PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), /* NVME_AUX_RESET_L */ @@ -157,13 +142,8 @@ const __weak struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size) { - if (variant_uses_v3_schematics()) { - *size = ARRAY_SIZE(gpio_set_stage_rom_v3); - return gpio_set_stage_rom_v3; - } - - *size = ARRAY_SIZE(gpio_set_stage_rom_pre_v3); - return gpio_set_stage_rom_pre_v3; + *size = ARRAY_SIZE(gpio_set_stage_rom); + return gpio_set_stage_rom: }
const __weak diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 106ebd6..b3cbf67 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -9,20 +9,7 @@ #include <boardid.h> #include <variant/gpio.h>
-static const struct soc_amd_gpio gpio_set_stage_rom_pre_v3[] = { - /* NVME_AUX_RESET_L */ - PAD_GPO(GPIO_40, HIGH), - /* CLK_REQ0_L - WIFI */ - PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), - /* CLK_REQ1_L - SD Card */ - PAD_NF(GPIO_115, CLK_REQ1_L, PULL_UP), - /* CLK_REQ4_L - SSD */ - PAD_NF(GPIO_132, CLK_REQ4_L, PULL_UP), - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_142, HIGH), -}; - -static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = { +static const struct soc_amd_gpio gpio_set_stage_rom[] = { /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), /* CLK_REQ0_L - WIFI */ @@ -151,13 +138,8 @@ const __weak struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size) { - if (variant_uses_v3_schematics()) { - *size = ARRAY_SIZE(gpio_set_stage_rom_v3); - return gpio_set_stage_rom_v3; - } - - *size = ARRAY_SIZE(gpio_set_stage_rom_pre_v3); - return gpio_set_stage_rom_pre_v3; + *size = ARRAY_SIZE(gpio_set_stage_rom); + return gpio_set_stage_rom; }
const __weak