[coreboot-gerrit] [M] Change in coreboot[main]: soc/amd/*: pass PSP NVRAM base and size to amdfwtool

[Felix Held (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk.

Hello Fred Reitberger, Jason Glenesk, Matt DeVillier, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/83814?usp=email

to look at the new patch set (#2).

Change subject: soc/amd/*: pass PSP NVRAM base and size to amdfwtool
......................................................................

soc/amd/*: pass PSP NVRAM base and size to amdfwtool

Pass the PSP NVRAM base and size to amdfwtool for all SoCs except Genoa
which doesn't use/support this. This was previously only implemented for
Picasso, but not for the SoCs that support this, so add the support to
those other SoCs as well.

If a mainboard has an section named 'PSP_NVRAM' in its FMAP file, the
start and length of it in the flash will be passed to amdfwtool which
then adds the base and length to the corresponding type 0x04 PSP
directory table entry.

Signed-off-by: Felix Held 
Change-Id: I785ede8eb0df2473a4390b2c305add20f38d7ede
---
M src/soc/amd/cezanne/Makefile.mk
M src/soc/amd/glinda/Makefile.mk
M src/soc/amd/mendocino/Makefile.mk
M src/soc/amd/phoenix/Makefile.mk
M src/soc/amd/stoneyridge/Makefile.mk
5 files changed, 50 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/83814/2