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Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83981?usp=email )
Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID and fix vw mapping
......................................................................
Patch Set 5:
(4 comments)
Patchset:
PS5:
can you split this cl into two cls
1. 16-bit cpu port (kconfig and .h)
2. vm index changes as PTL vm entries are not continuous
File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/c/coreboot/+/83981/comment/c09656b6_7c57cc3a?usp... :
PS5, Line 1062: /* Get the community (potentially updating 'comm' if vw_map exists) */
: comm = gpio_get_community(pad);
remove this as line #1060
https://review.coreboot.org/c/coreboot/+/83981/comment/4ada9755_8bf7b737?usp... :
PS5, Line 1064:
: /* Find the VW entry containing 'pad' */
same as well
https://review.coreboot.org/c/coreboot/+/83981/comment/bce81235_bcf0ce47?usp... :
PS5, Line 1073: /* Check if we found a valid entry */
u can drop this comment. I have added that for explanation 😎
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