the following patch was just integrated into master: commit 40f558e8f4f77ab70a8a2eb9bdfa850e362cb553 Author: huang lin hl@rock-chips.com Date: Fri Sep 19 14:51:52 2014 +0800
rockchip: support display
Implement VOP and eDP drivers, vop and edp clock configuration, framebuffer allocation and display configuration logic. The eDP driver reads panel EDID to determine panel dimensions and the pixel clock used by the VOP. The pixel clock is generating using the NPLL.
BUG=chrome-os-partner:31897 TEST=Booted Veyron Pinky and display normal BRANCH=None
Change-Id: I01b5c347a3433a108806aec61aa3a875cab8c129 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: e4f863b0b57f2f5293ea8015db86cf7f8acc5853 Original-Change-Id: I61214f55e96bc1dcda9b0f700e5db11e49e5e533 Original-Signed-off-by: huang lin hl@rock-chips.com Original-Reviewed-on: https://chromium-review.googlesource.com/219050 Original-Reviewed-by: Julius Werner jwerner@chromium.org Reviewed-on: http://review.coreboot.org/9553 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org
See http://review.coreboot.org/9553 for details.
-gerrit