[coreboot-gerrit] [S] Change in coreboot[main]: soc/amd/common: use common physical address bit reservation code

[Jérémy Compostella (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Marshall Dawson, Matt DeVillier.

Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78074?usp=email )

Change subject: soc/amd/common: use common physical address bit reservation code
......................................................................

Patch Set 2:

(1 comment)

File src/soc/amd/common/block/cpu/noncar/cpu.c:

https://review.coreboot.org/c/coreboot/+/78074/comment/cd1aeeb7_d2603d28 :
PS2, Line 45: 	else
> just tried removing the else to see how the code looks after that and at least for me that makes les […]

This is not a blocker to me, I just noticed it so I posted the comment, feel free to do whatever you like. In addition I am sure there are some people here who may disagree with me. Below is how I would personally write it and then the coding style principles behind it. Note that coding style can be a bit personal so this is just my opinion backed up by a lot of experience though.

```
if (!(rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE))
        return 0;

uint32 ebx = cpuid_ebx(CPUID_EBX_MEM_ENCRYPT);
return ebx & CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK >> CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT;
```

1. Break the code early if there is nothing to do.
   - It helps to see from the beginning what are the "rejection" cases
   - It keeps the main case and code non-indented => easier to read
2. I separated the loading of the data. It helps to differentiate the function calls (loading) and the decoding of the data. It also helps to have a potentially nicer indentation as it uses two lines instead of one.
3. I did not use any parenthesis as the C operators precedence of both `&` and `>>` is Left-to-Right and I don't think they would bring more clarity.