Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19664 )
Change subject: src/include/device: Add PCIe root ports device ids ......................................................................
src/include/device: Add PCIe root ports device ids
Change-Id: Ic2df7fb1e4a3d3c52561b949c4b359ea59824387 Signed-off-by: Aamir Bohra aamir.bohra@intel.com Reviewed-on: https://review.coreboot.org/19664 Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Aaron Durbin adurbin@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h 1 file changed, 60 insertions(+), 0 deletions(-)
Approvals: Aaron Durbin: Looks good to me, approved Subrata Banik: Looks good to me, but someone else must approve build bot (Jenkins): Verified
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index f243414..5a2e1b2 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2673,6 +2673,66 @@ #define PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM 0x9d56 #define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8
+/* Intel PCIE device ids */ +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1 0x9d10 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP2 0x9d11 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP3 0x9d12 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP4 0x9d13 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP5 0x9d14 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP6 0x9d15 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP7 0x9d16 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP8 0x9d17 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP9 0x9d18 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP10 0x9d19 +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP11 0x9d1a +#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP12 0x9d1b + +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP1 0xa110 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP2 0xa111 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP3 0xa112 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP4 0xa113 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP5 0xa114 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP6 0xa115 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP7 0xa116 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP8 0xa117 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP9 0xa118 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP10 0xa119 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP11 0xa11a +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP12 0xa11b +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP13 0xa11c +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP14 0xa11d +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP15 0xa11e +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP16 0xa11f +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP17 0xa167 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP18 0xa168 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP19 0xa169 +#define PCI_DEVICE_ID_INTEL_SPT_H_PCIE_RP20 0xa16a + +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP1 0xa290 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP2 0xa291 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP3 0xa292 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP4 0xa293 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP5 0xa294 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP6 0xa295 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP7 0xa296 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP8 0xa297 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP9 0xa298 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP10 0xa299 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP11 0xa29a +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP12 0xa29b +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP13 0xa29c +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP14 0xa29d +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP15 0xa29e +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP16 0xa29f +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP17 0xa2e7 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP18 0xa2e8 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP19 0xa2e9 +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP20 0xa2ea +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP21 0xa2eb +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP22 0xa2ec +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP23 0xa2ed +#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP24 0xa2ee + /* Intel SATA device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_U_SATA 0x9d03 #define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA 0x9d07