Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31836
Change subject: drivers/intel/fsp2_0: Add provision to include PPI directory ......................................................................
drivers/intel/fsp2_0: Add provision to include PPI directory
This patch adds a generic provision into FSP2.0 driver to implement dedicated PEIM to PEIM interface as per Intel FSP requirement.
Change-Id: I988d55890f8dd95ccf80c1f1ec2eba8196ddf9a7 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/Makefile.inc 2 files changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/31836/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 8e64c6b..3951e9a 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -172,4 +172,15 @@ This allows deployed systems to bump their version number with the same FSP which will trigger a retrain of the memory.
+config FSP_PEIM_TO_PEIM_INTERFACE + bool + help + This option allows SOC user to create specific PPI for Intel FSP + usage, coreboot will provide required PPI structure definitions + along with all APIs as per EFI specification. + +if FSP_PEIM_TO_PEIM_INTERFACE +source "src/drivers/intel/fsp2_0/ppi/Kconfig" +endif + endif diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 79fe5f8..f26a776 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -82,4 +82,7 @@ CPPFLAGS_common+=-I$(CONFIG_FSP_HEADER_PATH) endif
+# Include PPI directory of CONFIG_FSP_PEIM_TO_PEIM_INTERFACE is enable +subdirs-$(CONFIG_FSP_PEIM_TO_PEIM_INTERFACE) += ppi + endif