Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13664
-gerrit
commit 87c2d66ad7af5acb6a81fba09c02f0f63a779588 Author: Vladimir Serbinenko phcoder@gmail.com Date: Wed Feb 10 03:03:41 2016 +0100
ktqm77: Support native raminit
Change-Id: Ic90d3aa714e5681c5021e2b05275d57dce428de0 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/mainboard/kontron/ktqm77/Kconfig | 10 ++++++---- src/mainboard/kontron/ktqm77/romstage.c | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index ba5e3da..8ec7f31 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -12,11 +12,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME select ENABLE_VMX - select HAVE_MRC
-config USE_NATIVE_RAMINIT - bool - default n +if !USE_NATIVE_RAMINIT +config BOARD_SPECIFIC_OPTIONS_MRC # dummy + def_bool y + select HAVE_MRC +endif +
config MAINBOARD_DIR string diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 8f3f900..59c97ae 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -28,6 +28,7 @@ #include <console/console.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> +#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <arch/cpu.h> #include <cpu/x86/msr.h> @@ -153,6 +154,29 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) *pei_data = pei_data_template; }
+const struct southbridge_usb_port mainboard_usb_ports[] = { + /* enabled power usb oc pin */ + { 1, 0, 0 }, /* P0: lower left USB 3.0 (OC0) */ + { 1, 0, 0 }, /* P1: upper left USB 3.0 (OC0) */ + { 1, 0, 0 }, /* P2: lower right USB 3.0 (OC0) */ + { 1, 0, 0 }, /* P3: upper right USB 3.0 (OC0) */ + { 1, 0, 0 }, /* P4: lower USB 2.0 (OC0) */ + { 1, 0, 0 }, /* P5: upper USB 2.0 (OC0) */ + { 1, 0, 0 }, /* P6: front panel USB 2.0 (OC0) */ + { 1, 0, 0 }, /* P7: front panel USB 2.0 (OC0) */ + { 1, 0, 4 }, /* P8: internal USB 2.0 (OC4) */ + { 1, 0, 4 }, /* P9: internal USB 2.0 (OC4) */ + { 1, 0, 4 }, /* P10: internal USB 2.0 (OC4) */ + { 1, 0, 4 }, /* P11: internal USB 2.0 (OC4) */ + { 1, 0, 4 }, /* P12: internal USB 2.0 (OC4) */ + { 1, 0, 4 }, /* P13: internal USB 2.0 (OC4) */ +}; + +void mainboard_get_spd(spd_raw_data *spd) { + read_spd(&spd[0], 0x50); + read_spd(&spd[2], 0x52); +} + void mainboard_early_init(int s3resume) { /* Enable PEG10 (1x16) */