[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: add soc implementation for ETR address API

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36569 )

Change subject: soc/intel/skylake: add soc implementation for ETR address API
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Patch Set 10:

(1 comment)

https://review.coreboot.org/c/coreboot/+/36569/9/src/soc/intel/skylake/pmuti... 
File src/soc/intel/skylake/pmutil.c:

https://review.coreboot.org/c/coreboot/+/36569/9/src/soc/intel/skylake/pmuti... 
PS9, Line 178: 	return pci_mmio_config32_addr(PCH_DEVFN_PMC << 12, ETR);
> Done

I don't think update() would be more complicated. One would pass in an AND and OR mask, but we can do that later if this direction is too unpalatable.