Attention is currently required from: Nico Huber, Paul Menzel, Tim Wawrzynczak, Arthur Heymans, Michael Niewöhner, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58221 )
Change subject: soc/intel/cannonlake: Enable Energy/Performance Bias control
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Patch Set 1:
(1 comment)
Patchset:
PS1:
IIRC we intentionally left this to the OS
Who is "we"?
Intel recommends setting POWER_CTL bit 18 in BIOS (boot firmware) to enable EPB control. The OS can then use the IA32_ENERGY_PERF_BIAS MSR to control EPB.
Yes, coreboot programs this MSR in the `set_energy_perf_bias()` function, but I'm pretty sure it's for backwards compatibility with older OSes without EPB support. OSes with EPB support simply overwrite coreboot's value as needed.
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