Attention is currently required from: Furquan Shaikh, Duncan Laurie, Kyösti Mälkki, Werner Zeh.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52723 )
Change subject: drivers/i2c/designware: Use safe defaults for SCL parameters
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52723/comment/2d93680e_6683fe64
PS1, Line 11: If I2C bus step response has not been measured, assume
: the layout to be designed with a minimal capacitance and
: SCL rise and fall times of 0 ns. The calculations will
: add the required amount of reference clocks for the host
: to drive SCL high or low, such that the maximum bus
: frequency specification is met.
nit: fill this out to 72 chars wide
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