[coreboot-gerrit] [L] Change in coreboot[master]: soc/amd/block/ivrs: Generalize IVRS table generation

[Naresh Solanki (Code Review)]

Attention is currently required from: Arthur Heymans, Felix Held, Felix Singer, Fred Reitberger, Jason Glenesk, Marvin Drees, Matt DeVillier, Raul Rangel.

Naresh Solanki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75451?usp=email )

Change subject: soc/amd/block/ivrs: Generalize IVRS table generation
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Patch Set 7:

(1 comment)

File src/soc/amd/common/block/acpi/ivrs.c:

https://review.coreboot.org/c/coreboot/+/75451/comment/38928d37_6999b1c6 :
PS7, Line 262: /* Find EMMC */
             : 	if (!nb_dev->bus)
             : 		dev = pcidev_path_behind(nb_dev->bus, PCI_DEVFN(0x13, 1));
> > Previously, the entry was added without any conditions. […]

Thanks for the input.
In that case should this limited to 1st IOMMU domain?
i.e.,
if (dev->link_list->secondary == 0) {
    /* Describe EMMC */
    current = ivhd_describe_f0_device(current, PCI_DEVFN(0x13, 1),
    			IVHD_DTE_LINT_1_PASS | IVHD_DTE_LINT_0_PASS |
    			IVHD_DTE_SYS_MGT_TRANS   | IVHD_DTE_NMI_PASS |
    			IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS);
}