[coreboot-gerrit] Change in coreboot[master]: haswell: Add Intel TXT support in romstage

[Michał Żygowski (Code Review)]

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46608 )

Change subject: haswell: Add Intel TXT support in romstage
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46608/5/src/security/intel/txt/comm... 
File src/security/intel/txt/common.c:

https://review.coreboot.org/c/coreboot/+/46608/5/src/security/intel/txt/comm... 
PS5, Line 310: 	//write32((void *)MCU_BASE_ADDR, 0xffe1a990);
I know where these come from. They were used to setup APs for ACM launch. Do we setup APs somewhere?