Attention is currently required from: Tarun Tuli, Paul Menzel, Sridhar Siricilla.
Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74209 )
Change subject: soc/intel/: Implement an API to get ISH version ......................................................................
Patch Set 10:
(4 comments)
File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/74209/comment/9e2a8026_c3e8676d PS9, Line 1277: /* : * Initialize the CSE device with provided temporary BAR. If BAR is 0 use a : * default. This is intended for pre-mem usage only where BARs haven't been : * assigned yet and devices are not enabled.
May I know how this comment is connected with get_ish_version()?
Ack
https://review.coreboot.org/c/coreboot/+/74209/comment/8dc7f72c_9d6e458a PS9, Line 1282: bool
please prefer enum cb_err.
Ack
File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/74209/comment/2982c1ff_a73f8d06 PS9, Line 453: bool
please prefer enum cb_err.
Ack
File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/74209/comment/2d218856_7dfdd3af PS5, Line 547: if the latest ISH version is not updated in the CBMEM table
Ah, you meant “not up to date”. […]
Ack