[coreboot-gerrit] Change in coreboot[master]: soc/intel/gpio: set default value for RXEVCFG in native mode

[Lance Zhao (Code Review)]

Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41030 )

Change subject: soc/intel/gpio: set default value for RXEVCFG in native mode
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Patch Set 1:
> Patch Set 1:
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> (1 comment)

That's skylake/kabylake PCH BIOS write guide.
What I try to say is, GPIO as native mode for output, native mode take full control. But GPIO pin as native mode for input, the following register can still take effect. RXRAW,RXTXEnCfg,DebEn,PreGfRXSel,RXINV,RxPadStSel.

So the original of the commit is actual right, bufdis/trig will not be effected by native mode anyway.