Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41069 )
Change subject: soc/amd/common/block/lpc: Add config options for eSPI ......................................................................
soc/amd/common/block/lpc: Add config options for eSPI
eSPI on Picasso is configured using the LPC bridge configuration registers. This change enables config options to allow SoC to select if it supports eSPI (SOC_AMD_COMMON_BLOCK_HAS_ESPI) and mainboard to select if it wants to use eSPI instead of LPC for talking to legacy devices and embedded controllers (SOC_AMD_COMMON_BLOCK_USE_ESPI).
BUG=b:154445472
Change-Id: I15e9eb25706e09393c019eea4d61b66f17490be6 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/common/block/lpc/Kconfig 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/41069/1
diff --git a/src/soc/amd/common/block/lpc/Kconfig b/src/soc/amd/common/block/lpc/Kconfig index b0d59a5..9bc9010 100644 --- a/src/soc/amd/common/block/lpc/Kconfig +++ b/src/soc/amd/common/block/lpc/Kconfig @@ -3,3 +3,18 @@ default n help Select this option to use the traditional LPC-ISA bridge at D14F3. + +config SOC_AMD_COMMON_BLOCK_HAS_ESPI + bool + default n + help + Select this option if platform supports eSPI using D14F3 configuration + registers. + +config SOC_AMD_COMMON_BLOCK_USE_ESPI + bool + depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI + default n + help + Select this option if mainboard uses eSPI instead of LPC (if supported + by platform).