[coreboot-gerrit] [L] Change in coreboot[master]: mb/intel: add ArcherCity CRB support

[Paul Menzel (Code Review)]

Attention is currently required from: Patrick Rudolph, Simon Chou, Johnny Lin, Tim Chu.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71968 )

Change subject: mb/intel: add ArcherCity CRB support
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Patch Set 8:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/71968/comment/f20cec3b_a8776526 
PS2, Line 9: Intel ArcherCity CRB is a dual socket CRB with Intel
           : Sapphire Rapids Scalable Processor chipset. The chipset
           : also includes EmmitsBurg PCH.
> Hi Paul, From the coreboot tutorial as below link it requests the commit messsage shall be 80 charac […]

You cite an example, which is about the source code files, and not the commit message. (Also that is outdated.)

Anyway, cf `util/lint/checkpatch.pl`, and Ic9c686cb1a902259b18377b76b5c999e94660fed.