Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71661 )
Change subject: mb/system76/adl-p: Add CPU PCIe RP RTD3 configs ......................................................................
mb/system76/adl-p: Add CPU PCIe RP RTD3 configs
Tested with the following drives:
- Crucial P5 Plus (CT500P5PSSD8) - Kingston KC3000 (SKC3000S/512G) - Sabrent Rocket NVMe 4.0 (SB-ROCKET-NVMEe4-500) - Samsung 970 EVO (MZ-V7E250) - Samsung 970 EVO Plus (MZ-V7S250) - Samsung 980 PRO (MZ-V8P2T0) - WD Black SN850X (WDS100T2XD0E) - WD Blue SN580 (WDS500G2B0C) - WD Green SN350 (WDS240G2G0C)
Test:
- System still asserts `SLP_S0#` during suspend (power LED blinks) - `slp_s0_residency_usec` still increases after suspend
Change-Id: I919d75cb2a88c0d623c46e44c506ec2d85567995 Signed-off-by: Tim Crawford tcrawford@system76.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/71661 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Jeremy Soller jeremy@system76.com --- M src/mainboard/system76/adl-p/variants/darp8/overridetree.cb M src/mainboard/system76/adl-p/variants/galp6/overridetree.cb 2 files changed, 42 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Jeremy Soller: Looks good to me, approved
diff --git a/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb b/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb index 4a554ad..4caed3a 100644 --- a/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb +++ b/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb @@ -22,6 +22,12 @@ .clk_req = 0, .flags = PCIE_RP_LTR, }" + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD2_PWR_EN + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_CPU_SSD2_RST# + register "srcclk_pin" = "0" # SSD2_CLKREQ# + device generic 0 on end + end end device ref tcss_xhci on register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" diff --git a/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb b/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb index fc93fdc..e63e185 100644 --- a/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb +++ b/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb @@ -20,6 +20,12 @@ .clk_req = 0, .flags = PCIE_RP_LTR, }" + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD1_PWR_EN + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_SSD1_RST# + register "srcclk_pin" = "0" # SSD1_CLKREQ# + device generic 0 on end + end end device ref tcss_xhci on register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"