Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31615 )
Change subject: mb/google/cyan: fix RAM training on edgar variant ......................................................................
Patch Set 1:
(3 comments)
Does this have a boot time penalty?
no, it allows the board (with specific Micron modules) to actually boot with a populated MRC cache. Without this patch, boot fails at ram init when loading training data from MRC cache
https://review.coreboot.org/#/c/31615/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31615/1//COMMIT_MSG@11 PS1, Line 11: leading to boot failure after : the MRC cache was populated
Maybe be more specific, that there was just a black screen and nothing happening?
done
https://review.coreboot.org/#/c/31615/1//COMMIT_MSG@13 PS1, Line 13: init parameters for edgar.
Where did you get these from?
added info on source Chromium commit
https://review.coreboot.org/#/c/31615/1//COMMIT_MSG@14 PS1, Line 14:
Is there already a corresponding commit in the downstream Chromium repositories?
info added