Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33211
Change subject: nb/amd/amdmct/mct: Deduplicate conditional ......................................................................
nb/amd/amdmct/mct: Deduplicate conditional
The pDCTstat->Speed check has already been performed on line 75, so we can merge the two branches of this conditional.
Change-Id: I41aa19b4b7ed7b1a0e4f83f72e66869760e677dd Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: Coverity CID 1229583 --- M src/northbridge/amd/amdmct/mct/mctardk3.c 1 file changed, 4 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/33211/1
diff --git a/src/northbridge/amd/amdmct/mct/mctardk3.c b/src/northbridge/amd/amdmct/mct/mctardk3.c index ce79a52..2d1f900 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk3.c +++ b/src/northbridge/amd/amdmct/mct/mctardk3.c @@ -90,21 +90,10 @@ valx &= 0xAA; valx >>= 1; } - if (mctGet_NVbits(NV_MAX_DIMMS) == 8) { - val &= valx; - if (val != 0) { - pDCTstat->CH_ADDR_TMG[dct] &= 0xFFFF00FF; - pDCTstat->CH_ADDR_TMG[dct] |= 0x00002F00; - } - } else { - val &= valx; - if (val != 0) { - if (pDCTstat->Speed == 3 || pDCTstat->Speed == 3) { - pDCTstat->CH_ADDR_TMG[dct] &= 0xFFFF00FF; - pDCTstat->CH_ADDR_TMG[dct] |= 0x00002F00; - } - } - + val &= valx; + if (val != 0) { + pDCTstat->CH_ADDR_TMG[dct] &= 0xFFFF00FF; + pDCTstat->CH_ADDR_TMG[dct] |= 0x00002F00; } } }