[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge/southbridge: drop ENV_X86 check

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59960 )

Change subject: soc/amd/stoneyridge/southbridge: drop ENV_X86 check
......................................................................

soc/amd/stoneyridge/southbridge: drop ENV_X86 check

Stoneyridge selects ARCH_X86 unconditionally and all coreboot code will
run on the x86 cores. On Picasso and later, the Chromebooks run verstage
on the PSP which is an ARM V7 core which needs some special handling
cases in the code, but this doesn't apply to Stoneyridge.

TEST=Timeless build results in an identical image for Google/Careena.

Signed-off-by: Felix Held 
Change-Id: I013efd13b56c0191af034a8c4b58e9b26a31c6e9
---
M src/soc/amd/stoneyridge/southbridge.c
1 file changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/59960/1

diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index de27ac5..1ed2b9a 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -230,8 +230,7 @@
 static void sb_init_spi_base(void)
 {
    /* Make sure the base address is predictable */
-	if (ENV_X86)
-		lpc_set_spibase(SPI_BASE_ADDRESS);
+	lpc_set_spibase(SPI_BASE_ADDRESS);
    lpc_enable_spi_rom(SPI_ROM_ENABLE);
 }