Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56717 )
Change subject: soc/intel/common: Calculate and configure SF Mask 2
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/56717/comment/7198aafd_b739ccc8
PS1, Line 540: mov %ebx, %eax /* restore data_ways in eax */
: xorl %edx, %edx
: mov $IA32_CR_SF_QOS_MASK_2, %ecx
: wrmsr
This adds new behavior for CAR_HAS_SF_MASKS with both SF_MASK_2BITS_PER_WAY and !SF_MASK_2BITS_PER_WAY. Is that intended?
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