Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31762 )
Change subject: arch/x86/postcar: Add separate timestamp for postcar stage ......................................................................
arch/x86/postcar: Add separate timestamp for postcar stage
This patch adds dedicated timestamp value for postcar stage.
TEST=Able to see "start of postcar" and "end of postcar" timestamp while executing cbmem -t after booting to chrome console.
cbmem -t
951:returning from FspMemoryInit 20,485,324 (20,103,067) 4:end of romstage 20,559,235 (73,910) 100:start of postcar 20,560,266 (1,031) 101:end of postcar 20,570,038 (9,772)
Change-Id: I084f66949667ad598f811d4233b4e639bc4c113e Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31762 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/arch/x86/postcar.c M src/commonlib/include/commonlib/timestamp_serialized.h M src/lib/prog_loaders.c 3 files changed, 10 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c index ea05824..b4efc94 100644 --- a/src/arch/x86/postcar.c +++ b/src/arch/x86/postcar.c @@ -19,6 +19,7 @@ #include <cpu/x86/mtrr.h> #include <main_decl.h> #include <program_loading.h> +#include <timestamp.h>
/* * Systems without a native coreboot cache-as-ram teardown may implement @@ -35,6 +36,8 @@ /* Recover cbmem so infrastruture using it is functional. */ cbmem_initialize();
+ timestamp_add_now(TS_START_POSTCAR); + display_mtrrs();
/* Load and run ramstage. */ diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index cbf07b5..bb0dcfc 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -63,6 +63,8 @@ TS_LOAD_PAYLOAD = 90, TS_ACPI_WAKE_JUMP = 98, TS_SELFBOOT_JUMP = 99, + TS_START_POSTCAR = 100, + TS_END_POSTCAR = 101,
/* 500+ reserved for vendorcode extensions (500-600: google/chromeos) */ TS_START_COPYVER = 501, @@ -257,6 +259,8 @@ { TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" }, { TS_FSP_AFTER_END_OF_FIRMWARE, "returning from FspNotify(EndOfFirmware)" }, + { TS_START_POSTCAR, "start of postcar" }, + { TS_END_POSTCAR, "end of postcar" }, };
#endif diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 70ea7ef..da021f1 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -128,6 +128,9 @@ struct prog ramstage = PROG_INIT(PROG_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage");
+ if (ENV_POSTCAR) + timestamp_add_now(TS_END_POSTCAR); + timestamp_add_now(TS_END_ROMSTAGE);
/*