David Hendricks (dhendrix@chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17777
-gerrit
commit 3f1019b3d19bf8052223046692ccfd469a433f2a Author: David Hendricks dhendrix@chromium.org Date: Thu Dec 8 20:47:00 2016 -0800
veyron_*: Add new Micron and Hynix modules
This adds SDRAM entries for the following modules: - Micron: DDMT52L256M64D2PP-107 - Hynix: H9CCNNNBKTALBR-NUD
They are compatible with Samsung K4E8E324EB-EGCF, so this just copies sdram-lpddr3-samsung-2GB-24EB.inc and changes the name used in the comment near the top.
Notes on our "special snowflake" boards: - Rialto's SDRAM mapping is different, so I padded its SDRAM entries to 24 (to match other boards).
BUG=chrome-os-partner:59997 BRANCH=none TEST=Booted new modules on Mickey (see BUG)
Change-Id: I2e672ba7a63804fbb279f64e1750edf73341edf1 Signed-off-by: David Hendricks dhendrix@chromium.org --- src/mainboard/google/veyron/boardid.c | 2 +- src/mainboard/google/veyron/sdram_configs.c | 8 +++++ src/mainboard/google/veyron_mickey/boardid.c | 2 +- src/mainboard/google/veyron_mickey/sdram_configs.c | 8 +++++ src/mainboard/google/veyron_rialto/boardid.c | 2 +- src/mainboard/google/veyron_rialto/sdram_configs.c | 36 +++++++++++++--------- 6 files changed, 41 insertions(+), 17 deletions(-)
diff --git a/src/mainboard/google/veyron/boardid.c b/src/mainboard/google/veyron/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron/boardid.c +++ b/src/mainboard/google/veyron/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
- code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code; diff --git a/src/mainboard/google/veyron/sdram_configs.c b/src/mainboard/google/veyron/sdram_configs.c index 76e4f76..a9f458e 100644 --- a/src/mainboard/google/veyron/sdram_configs.c +++ b/src/mainboard/google/veyron/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ };
const struct rk3288_sdram_params *get_sdram_config() diff --git a/src/mainboard/google/veyron_mickey/boardid.c b/src/mainboard/google/veyron_mickey/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron_mickey/boardid.c +++ b/src/mainboard/google/veyron_mickey/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
- code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code; diff --git a/src/mainboard/google/veyron_mickey/sdram_configs.c b/src/mainboard/google/veyron_mickey/sdram_configs.c index 76e4f76..a9f458e 100644 --- a/src/mainboard/google/veyron_mickey/sdram_configs.c +++ b/src/mainboard/google/veyron_mickey/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ };
const struct rk3288_sdram_params *get_sdram_config() diff --git a/src/mainboard/google/veyron_rialto/boardid.c b/src/mainboard/google/veyron_rialto/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron_rialto/boardid.c +++ b/src/mainboard/google/veyron_rialto/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
- code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code; diff --git a/src/mainboard/google/veyron_rialto/sdram_configs.c b/src/mainboard/google/veyron_rialto/sdram_configs.c index 0e260c3..cbe8a3a 100644 --- a/src/mainboard/google/veyron_rialto/sdram_configs.c +++ b/src/mainboard/google/veyron_rialto/sdram_configs.c @@ -23,20 +23,28 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc" /* ram_code = 0000 */ #include "sdram_inf/sdram-lpddr3-K4E6E304EB-2GB-1CH.inc"/* ram_code = 0001 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0010 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0011 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0100 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0101 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0110 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0111 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1000 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-lpddr3-samsung-4GB-04EB.inc" /* ram_code = 0010 */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc" /* ram_code = 0011 */ +#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0100 */ +#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 0101 */ +#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0110 */ +#include "sdram_inf/sdram-lpddr3-elpida-2GB.inc" /* ram_code = 0111 */ +#include "sdram_inf/sdram-lpddr3-samsung-4GB.inc" /* ram_code = 1000 */ +#include "sdram_inf/sdram-lpddr3-hynix-4GB.inc" /* ram_code = 1001 */ +#include "sdram_inf/sdram-ddr3-nanya-2GB.inc" /* ram_code = 1010 */ +#include "sdram_inf/sdram-lpddr3-elpida-4GB.inc" /* ram_code = 1011 */ +#include "sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc" /* ram_code = 1100 */ +#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ +#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ +#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ };
const struct rk3288_sdram_params *get_sdram_config()