Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81558?usp=email )
(
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/cache_as_ram_fsp.S: Drop unused preprocessing directives ......................................................................
soc/intel/cache_as_ram_fsp.S: Drop unused preprocessing directives
Change-Id: I42bb15b8534d16401cd06ff803a8425221c5f3c1 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/81558 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S 1 file changed, 0 insertions(+), 9 deletions(-)
Approvals: Nico Huber: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S index c6d2a9c..4e057f0 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S @@ -1,16 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <cpu/x86/64bit/entry64.inc> -#include <cpu/x86/cr.h> #include <cpu/x86/post_code.h> -#include <device/pci_def.h> -#include <intelblocks/post_codes.h> - -#define CBFS_FILE_MAGIC 0 -#define CBFS_FILE_LEN (CBFS_FILE_MAGIC + 8) -#define CBFS_FILE_TYPE (CBFS_FILE_LEN + 4) -#define CBFS_FILE_CHECKSUM (CBFS_FILE_TYPE + 4) -#define CBFS_FILE_OFFSET (CBFS_FILE_CHECKSUM + 4)
.section .init, "ax", @progbits