Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu.
Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83923?usp=email )
Change subject: soc/mediatek/mt8196: Add NOR-Flash support ......................................................................
soc/mediatek/mt8196: Add NOR-Flash support
Add NOR-Flash drivers for flash read/write.
TEST=read nor flash data successfully. BUG=b:317009620
Change-Id: Id0a19f0520020f16c4cf9d62da4228a5b0371b91 Signed-off-by: Noah Shen noah.shen@mediatek.corp-partner.google.com --- M src/soc/mediatek/mt8196/Kconfig M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/spi.h M src/soc/mediatek/mt8196/spi.c 4 files changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/83923/1
diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig index 3096227..57b62dd 100644 --- a/src/soc/mediatek/mt8196/Kconfig +++ b/src/soc/mediatek/mt8196/Kconfig @@ -9,6 +9,7 @@ select ARCH_RAMSTAGE_ARMV8_64 select HAVE_UART_SPECIAL select SOC_MEDIATEK_COMMON + select FLASH_DUAL_IO_READ select ARM64_USE_ARCH_TIMER
if SOC_MEDIATEK_MT8196 diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 04f1ed1..96aea39 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -2,6 +2,7 @@
ifeq ($(CONFIG_SOC_MEDIATEK_MT8196),y)
+all-y += ../common/flash_controller.c all-y += ../common/gpio.c ../common/gpio_op.c gpio.c all-$(CONFIG_SPI_FLASH) += spi.c all-y += timer.c diff --git a/src/soc/mediatek/mt8196/include/soc/spi.h b/src/soc/mediatek/mt8196/include/soc/spi.h index 69025d2..84c6256 100644 --- a/src/soc/mediatek/mt8196/include/soc/spi.h +++ b/src/soc/mediatek/mt8196/include/soc/spi.h @@ -10,4 +10,6 @@
#include <spi-generic.h>
+void mtk_snfc_init(void); + #endif diff --git a/src/soc/mediatek/mt8196/spi.c b/src/soc/mediatek/mt8196/spi.c index 11bbb5f..e40bb3d 100644 --- a/src/soc/mediatek/mt8196/spi.c +++ b/src/soc/mediatek/mt8196/spi.c @@ -6,16 +6,59 @@ */
#include <device/mmio.h> +#include <gpio.h> #include <soc/addressmap.h> +#include <soc/flash_controller_common.h> #include <soc/spi.h> +#include <spi_flash.h> + +struct pad_func { + gpio_t gpio; + u8 func; + enum pull_select select; +}; + +#define PAD_FUNC_SEL(name, func, sel) {GPIO(name), PAD_##name##_FUNC_##func, sel} +#define PAD_FUNC(name, func) {GPIO(name), PAD_##name##_FUNC_##func} +#define PAD_FUNC_GPIO(name) {GPIO(name), 0} + +static const struct pad_func nor_pinmux[4] = { + /* GPIO 125 ~ 128 */ + PAD_FUNC_SEL(SDA10, SF_CK, GPIO_PULL_DOWN), + PAD_FUNC_SEL(SCL10, SF_CS, GPIO_PULL_UP), + PAD_FUNC_SEL(PERIPHERAL_EN5, SF_D0, GPIO_PULL_DOWN), + PAD_FUNC_SEL(PERIPHERAL_EN6, SF_D1, GPIO_PULL_DOWN), +}; + +void mtk_snfc_init(void) +{ + const struct pad_func *ptr = NULL; + + ptr = nor_pinmux; + for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++) { + gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select); + gpio_set_mode(ptr[i].gpio, ptr[i].func); + + if (gpio_set_driving(ptr[i].gpio, GPIO_DRV_14_MA) < 0) + printk(BIOS_ERR, + "%s: failed to set pin drive to 14 mA for %d\n", + __func__, ptr[i].gpio.id); + else + printk(BIOS_DEBUG, "%s: got pin drive: %#x\n", __func__, + gpio_get_driving(ptr[i].gpio)); + } +}
static const struct spi_ctrlr spi_flash_ctrlr = { .max_xfer_size = 65535, + .flash_probe = mtk_spi_flash_probe, };
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { { .ctrlr = &spi_flash_ctrlr, + .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, + .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, }, };