[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/nissa/var/riven: Set PCIe root port 4 speed to Gen2

[David Wu (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik.

David Wu has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/85520?usp=email )

Change subject: mb/google/nissa/var/riven: Set PCIe root port 4 speed to Gen2
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Patch Set 3:

(1 comment)

File src/mainboard/google/brya/variants/riven/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/85520/comment/6f02b87d_12f136a8?usp... :
PS1, Line 490: 	.pcie_rp_pcie_speed = 2,
> why we need to set wifi7 as Gen2 ?

As concluded in the 12/7 meeting, based on the current test results for #137, #138, all relevant parties have reached a consensus that the current solution to the issue is to set PCIe root port 4 speed to Gen2, apply the pcie_recovery_patch in #103, and implement the core90_fix in #85 from Intel. Debugging will continue to identify the root cause and develop a comprehensive solution to resolve the issue. Thank you.