Martin Roth (martinroth@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12803
-gerrit
commit e913a461637d667adf19de92229b4471af6e543f Author: Martin Roth martinroth@google.com Date: Fri Dec 25 13:38:43 2015 -0700
device: Follow on to large BAR fix
- Fix resource limit to align with CPU's physical address space - Exit early from pci_read_bases if a device is disabled.
Change-Id: Ia8c0138d9e01dfb612e4981bdcda91746e804b19 Signed-off-by: Martin Roth martinroth@google.com --- src/device/pci_device.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/device/pci_device.c b/src/device/pci_device.c index dfc290b..7be709a 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -279,8 +279,8 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index) /* 1MB limit. */ resource->limit = 0x000fffffUL; } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { - /* 64bit limit. */ - resource->limit = 0xffffffffffffffffULL; + /* 64bit limit. Limit to Physical address space */ + resource->limit = (0x1ULL << CONFIG_CPU_ADDR_BITS) - 1; resource->flags |= IORESOURCE_PCI64; } else { /* Invalid value. */ @@ -362,12 +362,13 @@ static void pci_read_bases(struct device *dev, unsigned int howmany) { unsigned long index;
+ if (dev->enabled == 0) + return; + for (index = PCI_BASE_ADDRESS_0; (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { struct resource *resource; resource = pci_get_resource(dev, index); - if (dev->enabled == 0) - return; index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; }