[coreboot-gerrit] [XS] Change in coreboot[master]: mb/google/kahlee: enable uart0 for console in devicetree

[Matt DeVillier (Code Review)]

Attention is currently required from: Jason Nien, Martin Roth.

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77094?usp=email )

Change subject: mb/google/kahlee: enable uart0 for console in devicetree
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mb/google/kahlee: enable uart0 for console in devicetree

Matches use in other AMD SoC boards.

Change-Id: Ibe18f87d8bf63603fb2eb87728395e45e9a9ef69
Signed-off-by: Matt DeVillier 
---
M src/mainboard/google/kahlee/variants/baseboard/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/77094/1

diff --git a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb
index 632ffa3..92c0d14 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb
@@ -109,4 +109,7 @@
    		device i2c 10 on end
    	end
    end
+
+	device ref uart_0 on end # console
+
 end	#chip soc/amd/stoneyridge