Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49381 )
Change subject: build system: Remove flock calls from intermediate processing ......................................................................
build system: Remove flock calls from intermediate processing
Now that intermediate coreboot.pre manipulation is serialized within the build system, remove the flock calls.
Change-Id: I8a767918aec5fcb7127ebb19ac46e58bed7967fb Signed-off-by: Patrick Georgi pgeorgi@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/49381 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: Julius Werner jwerner@chromium.org --- M src/ec/hp/kbc1126/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc M src/southbridge/intel/common/firmware/Makefile.inc 4 files changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Julius Werner: Looks good to me, approved
diff --git a/src/ec/hp/kbc1126/Makefile.inc b/src/ec/hp/kbc1126/Makefile.inc index 92a0a72..e136757 100644 --- a/src/ec/hp/kbc1126/Makefile.inc +++ b/src/ec/hp/kbc1126/Makefile.inc @@ -21,7 +21,7 @@ printf " Building kbc1126_ec_insert.\n" $(MAKE) -C util/kbc1126 printf " KBC1126 Inserting KBC1126 firmware blobs.\n" - flock $< $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \ + $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \ $(CONFIG_KBC1126_FW1_OFFSET) $(CONFIG_KBC1126_FW2_OFFSET) endif
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index a1771e8..900d48b 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -170,7 +170,7 @@ $(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom) printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \ "$(STONEYRIDGE_FWM_ROM_POSITION)" - flock $< dd if=$(obj)/amdfw.rom \ + dd if=$(obj)/amdfw.rom \ of=$(obj)/coreboot.pre conv=notrunc bs=1 \ seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 5a85fb6..caa49b8 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -159,7 +159,7 @@ ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) $(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom) printf " DD Adding AMD Firmware\n" - flock $< dd if=$(obj)/amdfw.rom \ + dd if=$(obj)/amdfw.rom \ of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1
else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc index 127da19..d5a48fd 100644 --- a/src/southbridge/intel/common/firmware/Makefile.inc +++ b/src/southbridge/intel/common/firmware/Makefile.inc @@ -35,7 +35,7 @@ endif add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL) printf " DD Adding Intel Firmware Descriptor\n" - flock $< dd if=$(IFD_BIN_PATH) \ + dd if=$(IFD_BIN_PATH) \ of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y) $(objutil)/ifdtool/ifdtool \