Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36081 )
Change subject: vc/amd/agesa/f16kb: Cast to UINT64 to avoid overflow ......................................................................
vc/amd/agesa/f16kb: Cast to UINT64 to avoid overflow
Evaluated using 32-bit arithmetic, then used in a context that expects an expression of type UINT64. Cast to UINT64 instead.
Change-Id: I4f0aa26e116b47505633897c790ca8e86ea5dc4e Signed-off-by: Joe Moore awokd@danwin1210.me Found-by: Coverity CID 1241847 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36081 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c index 856a21a..2f919d7 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c @@ -716,7 +716,7 @@ UINT8 i;
DctMemLimit = 0; - if (DctInterleavedMemSize == NBPtr->DCTPtr->Timings.DctMemSize << 6) { + if (DctInterleavedMemSize == (UINT64)(NBPtr->DCTPtr->Timings.DctMemSize) << 6) { // The whole memory range is interleaved for the DCTs with the minimum memory size for (i = 0; i < NBPtr->DctCount; i++) { DctMemLimit += DctInterleavedMemSize;