Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42901 )
Change subject: soc/intel/xeon_sp: Add read CPU PPIN MSR function
......................................................................
Patch Set 4: Code-Review+1
Ideally we do not want to duplicate the code in skx and cpx folders. That being said, we do have a plan to merge skx/cpx code base. One idea is to introduce processor family concept, similar like how mainboard variants are designed. So we are good for now.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/42901
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8c2eac055a065c06859a3cb7b48ed59f15ae2fc4
Gerrit-Change-Number: 42901
Gerrit-PatchSet: 4
Gerrit-Owner: Johnny Lin
Johnny_Lin@wiwynn.com
Gerrit-Reviewer: Christian Walter
christian.walter@9elements.com
Gerrit-Reviewer: Jingle Hsu
jingle_hsu@wiwynn.com
Gerrit-Reviewer: Jonathan Zhang
jonzhang@fb.com
Gerrit-Reviewer: Morgan Jang
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Philipp Deppenwiese
zaolin.daisuki@gmail.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Tue, 30 Jun 2020 16:17:28 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment