Aaron Durbin (adurbin@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4963
-gerrit
commit 5d4a9c7bbec6aa82afeeef66b50653c4bead5d4d Author: Shawn Nematbakhsh shawnn@chromium.org Date: Fri Nov 8 17:23:26 2013 -0800
rambi: Add DIRQs for trackpad and touchscreen
Also add the relevant info about these pins to the ASL tables + add SMBIOS type 41 data for these parts.
BUG=chrome-os-partner:22863 TEST=Manual on Rambi. Set some pins to GPIO_DIRQ, and then verify DIRQ regwrites w/ GPIO_DEBUG look correct.
Change-Id: Id40655f9fb2ea7b10e1ff58d0b2a8b4cc6f05ff8 Reviewed-on: https://chromium-review.googlesource.com/176299 Reviewed-by: Aaron Durbin adurbin@chromium.org Commit-Queue: Shawn Nematbakhsh shawnn@chromium.org Signed-off-by: Shawn Nematbakhsh shawnn@chromium.org Tested-by: Shawn Nematbakhsh shawnn@chromium.org Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/mainboard/google/rambi/acpi/mainboard.asl | 72 +++++++++++++++++++++++++++ src/mainboard/google/rambi/gpio.c | 17 +++++-- src/mainboard/google/rambi/irqroute.h | 7 +++ src/mainboard/google/rambi/mainboard.c | 30 ++++++++++- src/mainboard/google/rambi/onboard.h | 37 ++++++++++++++ 5 files changed, 159 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl index 948d7df..696d1aa 100644 --- a/src/mainboard/google/rambi/acpi/mainboard.asl +++ b/src/mainboard/google/rambi/acpi/mainboard.asl @@ -19,6 +19,8 @@ * MA 02110-1301 USA */
+#include <mainboard/google/rambi/onboard.h> + Scope (_SB) { Device (LID0) @@ -35,4 +37,74 @@ Scope (_SB) { Name(_HID, EisaId("PNP0C0C")) } + + Device (TPAD) + { + Name (_ADR, 0x0) + Name (_UID, 1) + + // Report as a Sleep Button device so Linux will + // automatically enable it as a wake source + Name (_HID, EisaId("PNP0C0E")) + + Name (_CRS, ResourceTemplate() + { + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + + VendorShort (ADDR) + { + BOARD_TRACKPAD_I2C_ADDR + } + }) + + Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 }) + + Method (_DSW, 3, NotSerialized) + { + Store (BOARD_TRACKPAD_WAKE_GPIO, Local0) + + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + // _SB.PCI0.LPCB.GWAK (Local0) + } + } + } + + Device (TSCR) + { + Name (_ADR, 0x0) + Name (_UID, 2) + + // Report as a Sleep Button device so Linux will + // automatically enable it as a wake source + Name (_HID, EisaId("PNP0C0E")) + + Name (_CRS, ResourceTemplate() + { + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TOUCHSCREEN_IRQ + } + + VendorShort (ADDR) + { + BOARD_TOUCHSCREEN_I2C_ADDR + } + }) + + Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 }) + + Method (_DSW, 3, NotSerialized) + { + Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0) + + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + // _SB.PCI0.LPCB.GWAK (Local0) + } + } + } } diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c index 9bcafad..7d44968 100644 --- a/src/mainboard/google/rambi/gpio.c +++ b/src/mainboard/google/rambi/gpio.c @@ -19,6 +19,7 @@
#include <stdlib.h> #include <baytrail/gpio.h> +#include "irqroute.h"
/* TODO(SHAWNN): Modify gpios labeled 'INT' for interrupt handling */ /* NCORE GPIOs */ @@ -110,7 +111,7 @@ static const struct soc_gpio_map gpscore_gpio_map[] = { GPIO_NC, /* S0-SC052 - SMB_SOC_CLK (XDP) */ GPIO_NC, /* S0-SC053 - SMB_SOC_ALERTB (NC) */ GPIO_DEFAULT, /* S0-SC054 - NC */ - GPIO_INPUT, /* S0-SC055 - TRACKPAD_INT_DX - INT */ + GPIO_DIRQ, /* S0-SC055 - TRACKPAD_INT_DX */ GPIO_INPUT, /* S0-SC056 - GPIO_S0_SC_56 - STRAP */ GPIO_FUNC1, /* S0-SC057 - PCH_UART_TXD */ GPIO_INPUT, /* S0-SC058 - SIM_DET_C */ @@ -127,7 +128,7 @@ static const struct soc_gpio_map gpscore_gpio_map[] = { GPIO_FUNC1, /* S0-SC069 - SIO_SPI_CLK */ GPIO_INPUT, /* S0-SC070 - ALS_INT_L - INT */ GPIO_NC, /* S0-SC071 - NC */ - GPIO_INPUT, /* S0-SC072 - TOUCH_INT_L_DX - INT */ + GPIO_DIRQ, /* S0-SC072 - TOUCH_INT_L_DX */ GPIO_NC, /* S0-SC073 - NC */ GPIO_NC, /* S0-SC074 - SIO_UART2_RXD (NC) */ GPIO_NC, /* S0-SC075 - SIO_UART2_TXD (NC) */ @@ -209,10 +210,20 @@ static const struct soc_gpio_map gpssus_gpio_map[] = { GPIO_END };
+static const u8 core_dedicated_irq[GPIO_MAX_DIRQS] = { + [TPAD_IRQ_OFFSET] = TPAD_IRQ_GPIO, + [TOUCH_IRQ_OFFSET] = TOUCH_IRQ_GPIO, +}; + +static const u8 sus_dedicated_irq[GPIO_MAX_DIRQS] = { +}; + static struct soc_gpio_config gpio_config = { .ncore = gpncore_gpio_map, .score = gpscore_gpio_map, - .ssus = gpssus_gpio_map + .ssus = gpssus_gpio_map, + .core_dirq = &core_dedicated_irq, + .sus_dirq = &sus_dedicated_irq, };
struct soc_gpio_config* mainboard_get_gpios(void) diff --git a/src/mainboard/google/rambi/irqroute.h b/src/mainboard/google/rambi/irqroute.h index 20f421b..fa7a6c3 100644 --- a/src/mainboard/google/rambi/irqroute.h +++ b/src/mainboard/google/rambi/irqroute.h @@ -45,3 +45,10 @@ PIRQ_PIC(F, DISABLE), \ PIRQ_PIC(G, DISABLE), \ PIRQ_PIC(H, DISABLE) + +/* CORE bank DIRQs - up to 16 supported */ +#define TPAD_IRQ_OFFSET 0 +#define TOUCH_IRQ_OFFSET 1 +/* Corresponding SCORE GPIO pins */ +#define TPAD_IRQ_GPIO 55 +#define TOUCH_IRQ_GPIO 72 diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c index bca9034..2e0652f 100644 --- a/src/mainboard/google/rambi/mainboard.c +++ b/src/mainboard/google/rambi/mainboard.c @@ -33,7 +33,9 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> +#include <smbios.h> #include "ec.h" +#include "onboard.h"
void mainboard_suspend_resume(void) { @@ -119,7 +121,7 @@ static int int15_handler(void) } break;
- default: + default: printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", X86_AX); break; } @@ -132,6 +134,32 @@ static void mainboard_init(device_t dev) mainboard_ec_init(); }
+static int mainboard_smbios_data(device_t dev, int *handle, + unsigned long *current) +{ + int len = 0; + + len += smbios_write_type41( + current, handle, + BOARD_TRACKPAD_NAME, /* name */ + BOARD_TRACKPAD_IRQ, /* instance */ + BOARD_TRACKPAD_I2C_BUS, /* segment */ + BOARD_TRACKPAD_I2C_ADDR, /* bus */ + 0, /* device */ + 0); /* function */ + + len += smbios_write_type41( + current, handle, + BOARD_TOUCHSCREEN_NAME, /* name */ + BOARD_TOUCHSCREEN_IRQ, /* instance */ + BOARD_TOUCHSCREEN_I2C_BUS, /* segment */ + BOARD_TOUCHSCREEN_I2C_ADDR, /* bus */ + 0, /* device */ + 0); /* function */ + + return len; +} + // mainboard_enable is executed as first thing after // enumerate_buses().
diff --git a/src/mainboard/google/rambi/onboard.h b/src/mainboard/google/rambi/onboard.h new file mode 100644 index 0000000..290f58c --- /dev/null +++ b/src/mainboard/google/rambi/onboard.h @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef ONBOARD_H +#define ONBOARD_H + +#include "irqroute.h" + +#define BOARD_TRACKPAD_NAME "trackpad" +#define BOARD_TRACKPAD_IRQ GPIO_S0_DED_IRQ(TPAD_IRQ_OFFSET) +#define BOARD_TRACKPAD_WAKE_GPIO 1 /* GPSSUS1 */ +#define BOARD_TRACKPAD_I2C_BUS 1 /* TODO(shawnn): Check this */ +#define BOARD_TRACKPAD_I2C_ADDR 0x67 /* TODO(shawnn): Check this */ + +#define BOARD_TOUCHSCREEN_NAME "touchscreen" +#define BOARD_TOUCHSCREEN_IRQ GPIO_S0_DED_IRQ(TOUCH_IRQ_OFFSET) +#define BOARD_TOUCHSCREEN_WAKE_GPIO 2 /* GPSSUS2 */ +#define BOARD_TOUCHSCREEN_I2C_BUS 2 /* TODO(shawnn): Check this */ +#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a /* TODO(shawnn): Check this */ + +#endif