Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36223 )
Change subject: soc/mediatek/mt8183: add dphy reset after setting lanes number ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/36223/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36223/1//COMMIT_MSG@9 PS1, Line 9: effor error?
https://review.coreboot.org/c/coreboot/+/36223/1//COMMIT_MSG@12 PS1, Line 12: none kukui
https://review.coreboot.org/c/coreboot/+/36223/1/src/soc/mediatek/common/dsi... File src/soc/mediatek/common/dsi.c:
https://review.coreboot.org/c/coreboot/+/36223/1/src/soc/mediatek/common/dsi... PS1, Line 397: setbits_le32(&dsi0->dsi_con_ctrl, DPHY_RESET); : clrbits_le32(&dsi0->dsi_con_ctrl, DPHY_RESET); no need to delay between them?