Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42440 )
Change subject: soc/intel/cannonlake: Add PchPmPwrCycDur to chip options ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42440/9/src/soc/intel/cannonlake/fs... File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/42440/9/src/soc/intel/cannonlake/fs... PS9, Line 99: n cfg_asst_dur-> can we do like below
max_wdth = slp_s4 if (max_wdth < slps3) max_wdth = slps3 if (max_wdth < slpsa) max_wdth = slpsa
https://review.coreboot.org/c/coreboot/+/42440/9/src/soc/intel/cannonlake/fs... PS9, Line 111: /* slp_s4_asst_dur_list : 1s, 1s, 2s, 3s, 4s(Default) */ : enum min_asst_dur slp_s4_asst_dur_list[] = { : MinAsstDur1s, MinAsstDur1s, MinAsstDur2s, MinAsstDur3s, MinAsstDur4s : }; : : /* slp_s3_asst_dur_list: 50ms, 60us, 50ms (Default), 2s */ : enum min_asst_dur slp_s3_asst_dur_list[] = { : MinAsstDur50ms, MinAsstDur60us, MinAsstDur50ms, MinAsstDur2s : }; : : /* slp_a_asst_dur_list: 2s, 0s, 4s, 98ms, 2s(Default) */ : enum min_asst_dur slp_a_asst_dur_list[] = { : MinAsstDur2s, MinAsstDur0s, MinAsstDur4s, MinAsstDur98ms, MinAsstDur2s : }; : : /* pm_pwr_cyc_dur_list: 4s(Default), 1s, 2s, 3s, 4s */ : enum min_asst_dur pm_pwr_cyc_dur_list[] = { : MinAsstDur4s, MinAsstDur1s, MinAsstDur2s, MinAsstDur3s, MinAsstDur4s : };
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