[coreboot-gerrit] Change in coreboot[master]: soc/amd: Move root complex SSDT TOM1/TOM2 generation function

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50892 )

Change subject: soc/amd: Move root complex SSDT TOM1/TOM2 generation function
......................................................................

soc/amd: Move root complex SSDT TOM1/TOM2 generation function

This will also be used for cezanne. Stoney also has a similar function,
but it hard codes the scope path. I didn't have a device setup to test
if switching to this function was a no-op. So I left it.

TOM2 isn't used by any ASL, so we could remove it later.

Signed-off-by: Raul E Rangel 
Change-Id: I7c8f476a7735fea61a3244b97988e3ead3b42e79
---
M src/soc/amd/common/block/acpi/tables.c
M src/soc/amd/common/block/include/amdblocks/acpi.h
M src/soc/amd/picasso/root_complex.c
3 files changed, 34 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/50892/1

diff --git a/src/soc/amd/common/block/acpi/tables.c b/src/soc/amd/common/block/acpi/tables.c
index 88ff252..8bad755 100644
--- a/src/soc/amd/common/block/acpi/tables.c
+++ b/src/soc/amd/common/block/acpi/tables.c
@@ -1,8 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <amdblocks/acpi.h>
 #include <amdblocks/chip.h>
+#include <assert.h>
+#include <cpu/amd/msr.h>
+#include <cpu/amd/mtrr.h>
 #include <device/device.h>
 #include <types.h>

@@ -45,3 +49,30 @@

return current;
 }
+
+/* Used by _SB.PCI0._CRS */
+void acpi_fill_root_complex_tom(const struct device *device)
+{
+	msr_t msr;
+	const char *scope;
+
+	assert(device);
+
+	scope = acpi_device_scope(device);
+	assert(scope);
+	acpigen_write_scope(scope);
+
+	msr = rdmsr(TOP_MEM);
+	acpigen_write_name_dword("TOM1", msr.lo);
+	msr = rdmsr(TOP_MEM2);
+	/*
+	 * Since XP only implements parts of ACPI 2.0, we can't use a qword
+	 * here.
+	 * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt
+	 * slide 22ff.
+	 * Shift value right by 20 bit to make it fit into 32bit,
+	 * giving us 1MB granularity and a limit of almost 4Exabyte of memory.
+	 */
+	acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
+	acpigen_pop_len();
+}
diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h
index d0806ec..215d668 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpi.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpi.h
@@ -54,5 +54,6 @@
    				    struct acpi_rsdp *rsdp);

unsigned long acpi_fill_madt_irqoverride(unsigned long current);
+void acpi_fill_root_complex_tom(const struct device *device);

#endif /* AMD_BLOCK_ACPI_H */
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c
index ee9764cb..c954701 100644
--- a/src/soc/amd/picasso/root_complex.c
+++ b/src/soc/amd/picasso/root_complex.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <acpi/acpigen.h>
+#include <amdblocks/acpi.h>
 #include <amdblocks/memmap.h>
 #include <amdblocks/ioapic.h>
 #include <arch/ioapic.h>
@@ -8,7 +9,6 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <cpu/amd/msr.h>
-#include <cpu/amd/mtrr.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -241,31 +241,9 @@
    acpigen_pop_len(); /* Scope _SB */
 }

-/* Used by _SB.PCI0._CRS */
 static void root_complex_fill_ssdt(const struct device *device)
 {
-	msr_t msr;
-	const char *scope;
-
-	assert(device);
-
-	scope = acpi_device_scope(device);
-	assert(scope);
-	acpigen_write_scope(scope);
-
-	msr = rdmsr(TOP_MEM);
-	acpigen_write_name_dword("TOM1", msr.lo);
-	msr = rdmsr(TOP_MEM2);
-	/*
-	 * Since XP only implements parts of ACPI 2.0, we can't use a qword
-	 * here.
-	 * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt
-	 * slide 22ff.
-	 * Shift value right by 20 bit to make it fit into 32bit,
-	 * giving us 1MB granularity and a limit of almost 4Exabyte of memory.
-	 */
-	acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
-	acpigen_pop_len();
+	acpi_fill_root_complex_tom(device);
    acipgen_dptci();
 }