Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60402 )
Change subject: drivers/intel/fsp2_0: Make FSP Notify Phase APIs optional ......................................................................
drivers/intel/fsp2_0: Make FSP Notify Phase APIs optional
The FSP API used to notify the FSP about different phases in the boot process. The current FSP specification support three notify phases: - Post PCI enumeration - Ready to Boot - End of Firmware
This patch attempts to make FSP Notify Phase APIs optional by using native coreboot implementation to perform the required lock down and chipset register configuration prior boot to payload.
BUG=b:211954778 TEST=Able to build brya without any compilation issue.
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: Ia95e9ec25ae797f2ac8e1c74145cf21e59867d64 --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/notify.c 2 files changed, 53 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/60402/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index a0e02a8..52819b6d 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -300,4 +300,40 @@ SoC users to select this Kconfig to set EnableMultiPhaseSiliconInit to enable and execute FspMultiPhaseSiInit() API.
+config SKIP_FSP_NOTIFY_PHASE_AFTER_PCI_ENUM + bool + help + The FSP API used to notify the FSP about different phases in the boot process. + The current FSP specification support three notify phases: + - Post PCI enumeration + - Ready to Boot + - End of Firmware + Select this on a platform where you want to skip calling FSP Notify + `Post PCI enumeration`. coreboot native implementation to perform the required lock down + and chipset register configuration prior boot to payload. + +config SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT + bool + help + The FSP API used to notify the FSP about different phases in the boot process. + The current FSP specification support three notify phases: + - Post PCI enumeration + - Ready to Boot + - End of Firmware + Select this on a platform where you want to skip calling FSP Notify `Ready to Boot`. + coreboot native implementation to perform the required lock down and chipset register + configuration prior boot to payload. + +config SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE + bool + help + The FSP API used to notify the FSP about different phases in the boot process. + The current FSP specification support three notify phases: + - Post PCI enumeration + - Ready to Boot + - End of Firmware + Select this on a platform where you want to skip calling FSP Notify `End of Firmware`. + coreboot native implementation to perform the required lock down and chipset register + configuration prior boot to payload. + endif diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index 311ce46..5fd5a5f 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -7,12 +7,29 @@ #include <timestamp.h> #include <mode_switch.h>
+static bool check_if_notify_allowed(enum fsp_notify_phase phase) +{ + if (phase == AFTER_PCI_ENUM && CONFIG(SKIP_FSP_NOTIFY_PHASE_AFTER_PCI_ENUM)) + return false; + else if (phase == READY_TO_BOOT && CONFIG(SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT)) + return false; + else if (phase == END_OF_FIRMWARE && CONFIG(SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) + return false; + else + return true; +} + static void fsp_notify(enum fsp_notify_phase phase) { uint32_t ret; fsp_notify_fn fspnotify; struct fsp_notify_params notify_params = { .phase = phase };
+ if (!check_if_notify_allowed(phase)) { + printk(BIOS_INFO, "coreboot skipped calling FSP notify phase: %08x.\n", phase); + return; + } + if (!fsps_hdr.notify_phase_entry_offset) die("Notify_phase_entry_offset is zero!\n");