[coreboot-gerrit] [M] Change in coreboot[master]: cpu,soc/intel: Separate single SSDT CPU entry

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74399 )

Change subject: cpu,soc/intel: Separate single SSDT CPU entry
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Patch Set 1:

(1 comment)

File src/cpu/intel/haswell/acpi.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174097):
https://review.coreboot.org/c/coreboot/+/74399/comment/b776764b_2b8528ff 
PS1, Line 328: static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package)
line length of 101 exceeds 100 columns