[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: lock AES-NI MSR

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35188 )

Change subject: soc/intel/skylake: lock AES-NI MSR
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Patch Set 8:

(1 comment)
> Patch Set 8:
>
> Intel SDM https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-3...
> lists that MSR as "Core", not as "Thread".
> You need to call intel_ht_sibling() or something similar to run it once on every core (I'm looking for a good code example, but can't find it ...).
>
> That might also be the culprit of crashing SGX init with HT enabled...

Thank you, I will look into this later this day and test SGX+HT again then

https://review.coreboot.org/c/coreboot/+/35188/7//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/35188/7//COMMIT_MSG@10 
PS7, Line 10: MSR datasheet.
> Ah, well, this is done as precaution

Done