Mono Moosbart (mono@posteo.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5393
-gerrit
commit 7082cd54eac8e59267aab72ef0ca8364b573c6c9 Author: Mono mono@posteo.de Date: Sun Mar 16 12:07:25 2014 +0100
Not-For-Merge: intel/i945: debug CID, PN and TCID
This patch just adds some debug output with printk to clearify the non-effectiveness of multiple writes to Write-Once bits. It also shows the default values of those bits.
On the MacBook2,1 the additional output is: ESD (default/before write No 1): 00000802 ESD (after write No 1): 00000802 ULD (default/before write No 1): 00000001 ULD (after write No 1): 00000001 ESD (before write No 2): 00000802 ESD (after write No 2): 00000802 ESD (before write No 3): 00000802 ESD (after write No 3): 00000802 ULD (before write No 2): 00000001 ULD (after write No 2): 00000001
It clearly shows, that the first writes to ESD and ULD do nothing, but writing the values that are default anyway. The second and third writes have no effect, although they try to change the settings.
Change-Id: I5ca2aebcaad2b348c9f6f9ece65069865d7e3853 Signed-off-by: Mono mono@posteo.de --- src/northbridge/intel/i945/early_init.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 57232af..59839f1 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -310,7 +310,9 @@ static void ich7_setup_dmi_rcrb(void)
RCBA32(V0CTL) = 0x80000001; RCBA32(V1CAP) = 0x03128010; + printk(BIOS_DEBUG, "ESD (before write No 2): %08x\n", RCBA32(ESD)); RCBA32(ESD) = 0x00000810; + printk(BIOS_DEBUG, "ESD (after write No 2): %08x\n", RCBA32(ESD)); RCBA32(RP1D) = 0x01000003; RCBA32(RP2D) = 0x02000002; RCBA32(RP3D) = 0x03000002; @@ -332,9 +334,13 @@ static void ich7_setup_dmi_rcrb(void) reg32 |= (0x40 << 1) | (4 << 17) | (1 << 24) | (1 << 31); RCBA32(V1CTL) = reg32;
+ printk(BIOS_DEBUG, "ESD (before write No 3): %08x\n", RCBA32(ESD)); RCBA32(ESD) |= (2 << 16); + printk(BIOS_DEBUG, "ESD (after write No 3): %08x\n", RCBA32(ESD));
+ printk(BIOS_DEBUG, "ULD (before write No 2): %08x\n", RCBA32(ULD)); RCBA32(ULD) |= (1 << 24) | (1 << 16); + printk(BIOS_DEBUG, "ULD (after write No 2): %08x\n", RCBA32(ULD));
RCBA32(ULBA) = DEFAULT_DMIBAR;
@@ -845,8 +851,12 @@ static void i945_setup_root_complex_topology(void)
static void ich7_setup_root_complex_topology(void) { + printk(BIOS_DEBUG, "ESD (default/before write No 1): %08x\n", RCBA32(ESD)); RCBA32(0x104) = 0x00000802; + printk(BIOS_DEBUG, "ESD (after write No 1): %08x\n", RCBA32(ESD)); + printk(BIOS_DEBUG, "ULD (default/before write No 1): %08x\n", RCBA32(ULD)); RCBA32(0x110) = 0x00000001; + printk(BIOS_DEBUG, "ULD (after write No 1): %08x\n", RCBA32(ULD)); RCBA32(0x114) = 0x00000000; RCBA32(0x118) = 0x00000000; }