HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43584 )
Change subject: nb/intel/haswell: Use macro for dimm->bus_width ......................................................................
nb/intel/haswell: Use macro for dimm->bus_width
Change-Id: Ice91a20470c107f7db0ac83301488ae5afed5a8b Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/haswell/raminit.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/43584/1
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 8cd9e77..5d67954 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -215,7 +215,7 @@ (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID2] << 8) | (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID1] & 0xff); dimm->mod_type = SPD_SODIMM; - dimm->bus_width = 0x3; /* 64-bit */ + dimm->bus_width = MEMORY_BUS_WIDTH_64; dimm_cnt++; } }