Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45794 )
Change subject: soc/intel/common/block/pmc: Add PMC API for low power programming ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45794/6/src/soc/intel/common/block/... File src/soc/intel/common/block/pmc/Kconfig:
https://review.coreboot.org/c/coreboot/+/45794/6/src/soc/intel/common/block/... PS6, Line 36: Enable this for PMC devices to perform registers programming : to ensure low power in active idle scenario. :
I should have commented way clearer :-)
no worries. 😊
actually this Kconfig does not cause code to be run but to be built and linked.
yup, agree.
Ack on the XTAL and PM timer, however, fsp does parts of that already. I'm working on some changes for that, but it'll take some ... hours maybe or a bit less
Yes, that was chain effect that we asked FSP to ensure they have those programming as well as part of FSP as well. But i would like to keep things in more control in coreboot because in some platform if FSP fails to do so, coreboot still has means to handle it. i meant for early SoC platform with newer FSP