Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29875
Change subject: sb/intel: Fix pointer casts ......................................................................
sb/intel: Fix pointer casts
Fix some compiler warnings due to pointer to integer conversions with different size. Required for 64bit ramstage.
Change-Id: Ibfb3cacf25adfb4a242d38e4ea290fdc3929a684 Signed-off-by: Patrick Rudolph siro@das-labor.org --- M src/southbridge/intel/common/smi.c M src/southbridge/intel/i82801ix/hdaudio.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801ix/sata.c 4 files changed, 9 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/29875/1
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c index 3c25556..3ce4f40 100644 --- a/src/southbridge/intel/common/smi.c +++ b/src/southbridge/intel/common/smi.c @@ -150,7 +150,7 @@ "outb %%al, %%dx\n\t" : /* ignore result */ : "a" (APM_CNT_GNVS_UPDATE), - "b" ((u32)gnvs), + "b" ((uintptr_t)gnvs), "d" (APM_CNT) ); } diff --git a/src/southbridge/intel/i82801ix/hdaudio.c b/src/southbridge/intel/i82801ix/hdaudio.c index 607604b..b4cee46 100644 --- a/src/southbridge/intel/i82801ix/hdaudio.c +++ b/src/southbridge/intel/i82801ix/hdaudio.c @@ -278,7 +278,7 @@ // NOTE this will break as soon as the Azalia get's a bar above // 4G. Is there anything we can do about it? base = res2mmio(res, 0, 0); - printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base); + printk(BIOS_DEBUG, "Azalia: base = %p\n", base); codec_mask = codec_detect(base);
if (codec_mask) { diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index a69b879..474c484 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -553,7 +553,7 @@
/* Add it to SSDT. */ acpigen_write_scope("\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_write_name_dword("NVSA", (uintptr_t)gnvs); acpigen_pop_len(); } } diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c index dcdeeb4..e35babc 100644 --- a/src/southbridge/intel/i82801ix/sata.c +++ b/src/southbridge/intel/i82801ix/sata.c @@ -30,9 +30,14 @@ { int i; u32 reg32; + struct resource *res;
/* Initialize AHCI memory-mapped space */ - u8 *abar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5); + res = find_resource(dev, PCI_BASE_ADDRESS_5); + if (!res) + return; + + u8 *abar = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "ABAR: %p\n", abar);
/* Set AHCI access mode.