Timothy Pearson (tpearson@raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10404
-gerrit
commit 7ca6a42ff1e835f5a1f0e6e53d4c918668cd2ec4 Author: Timothy Pearson tpearson@raptorengineeringinc.com Date: Tue Jun 2 20:25:03 2015 -0500
cpu/amd/car: Move AP stacks below the BSP stack to free up space
Caching SPD data during startup requires additional CAR space. There was a large chunk of free space between the AP stack top and the BSP stack bottom; moving the AP stacks below the BSP stack allows this space to be utilized.
TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR.
Change-Id: I370ff368affde7061d6547527bda058b9016e977 Signed-off-by: Timothy Pearson tpearson@raptorengineeringinc.com --- src/cpu/amd/car/cache_as_ram.inc | 4 ++-- src/cpu/amd/model_10xxx/init_cpus.c | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 51ebba6..5b80e332 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -377,7 +377,7 @@ CAR_FAM10_ap: /* * Need to set stack pointer for AP. * It will be from: - * CacheBase + CacheSize / 2 + * CacheBase + (CacheSize - CacheSizeBSPStack * 2) * - (NodeID << CoreIDbits + CoreID) * CacheSizeAPStack * So need to get the NodeID and CoreID at first. * If NB_CFG bit 54 is set just use initial APIC ID, otherwise need @@ -411,7 +411,7 @@ roll_cfg: /* Calculate stack pointer. */ movl $CacheSizeAPStack, %eax mull %ebx - movl $(CacheBase + CacheSize / 2), %esp + movl $(CacheBase + (CacheSize - CacheSizeBSPStack * 2)), %esp subl %eax, %esp
/* Retrive init detected. */ diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index aa21f37..f13eda52 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -250,7 +250,8 @@ static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo) u32 apicid; struct node_core_id id;
- void * lower_stack_region_boundary = (void*)((CONFIG_DCACHE_RAM_BASE + (CONFIG_DCACHE_RAM_SIZE / 2)) + void * lower_stack_region_boundary = (void*)((CONFIG_DCACHE_RAM_BASE + + (CONFIG_DCACHE_RAM_SIZE - (CONFIG_DCACHE_BSP_STACK_SIZE * 2))) - (CONFIG_MAX_CPUS * CONFIG_DCACHE_AP_STACK_SIZE)); if (((void*)(sysinfo+1)) > lower_stack_region_boundary) printk(BIOS_WARNING,