Frank Wu has uploaded this change for review. ( https://review.coreboot.org/25614
Change subject: soc/intel/skylake: check DPTF_TSR0_ACTIVE_AC* in _ACx methods ......................................................................
soc/intel/skylake: check DPTF_TSR0_ACTIVE_AC* in _ACx methods
Because thermal table is not included the values of DPTF_TSR0_ACTIVE_AC5 and DPTF_TSR0_ACTIVE_AC6 from internal nami/vayne thermal team. Add conditional compilation in _ACx methods if DPTF_ENABLE_FAN_CONTROL is defined in the dptf.asl.
BUG=b:72974136 BRANCH=poppy TEST=emerge-nami coreboot and booted on nami board.
Change-Id: I3e36ce94f714ff13f8ccee65992d7a9c7e0bb5b2 Signed-off-by: Frank Wu frank_wu@compal.corp-partner.google.com --- M src/soc/intel/skylake/acpi/dptf/thermal.asl 1 file changed, 14 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/25614/1
diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl index f1a3cef..d84807b 100644 --- a/src/soc/intel/skylake/acpi/dptf/thermal.asl +++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl @@ -155,41 +155,49 @@ }
#ifdef DPTF_ENABLE_FAN_CONTROL +#ifdef DPTF_TSR0_ACTIVE_AC0 Method (_AC0) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC0)) } - +#endif +#ifdef DPTF_TSR0_ACTIVE_AC1 Method (_AC1) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC1)) } - +#endif +#ifdef DPTF_TSR0_ACTIVE_AC2 Method (_AC2) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC2)) } - +#endif +#ifdef DPTF_TSR0_ACTIVE_AC3 Method (_AC3) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC3)) } - +#endif +#ifdef DPTF_TSR0_ACTIVE_AC4 Method (_AC4) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC4)) } - +#endif +#ifdef DPTF_TSR0_ACTIVE_AC5 Method (_AC5) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC5)) } - +#endif +#ifdef DPTF_TSR0_ACTIVE_AC6 Method (_AC6) { Return (_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC6)) } #endif +#endif } #endif