Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42440 )
Change subject: soc/intel/cannonlake: Add PchPmPwrCycDur to chip options
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Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42440/3/src/soc/intel/cannonlake/fs...
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/42440/3/src/soc/intel/cannonlake/fs...
PS3, Line 415: PchPmPwrCycDur
@Furquan, @Tim, Are you fine with just adding EDS documentation of PwrCyCDur requirement to the corr […]
I understand they've never been there before, but it is nice to have checks against "illegal" configurations 😊
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Gerrit-Project: coreboot
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Gerrit-Change-Number: 42440
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