[coreboot-gerrit] Change in coreboot[master]: xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices

[Johnny Lin (Code Review)]

Attention is currently required from: Marc Jones, Jonathan Zhang, Johnny Lin, Jingle Hsu, Morgan Jang, Patrick Rudolph, Tim Chu.
Hello Marc Jones, build bot (Jenkins), Jonathan Zhang, Jingle Hsu, Angel Pons, Morgan Jang, Patrick Rudolph, Tim Chu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/49893

to look at the new patch set (#3).

Change subject: xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices
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xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices

Set number_of_devices to CONFIG_DIMM_MAX.
mainboard can override the function for its maximum memory capacity
for each processor which will be used during SMBIOS type 16 creation.

Change-Id: Id8f92dc96a7a3eb2e6db330adda98a7fe6d516c8
Signed-off-by: Johnny Lin 
---
M src/soc/intel/xeon_sp/cpx/romstage.c
M src/soc/intel/xeon_sp/include/soc/romstage.h
2 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/49893/3